Xilinx DS610 User Manual
Browse online or download User Manual for Computer Accessories Xilinx DS610. Xilinx DS610 User Manual
- Page / 101
- Table of contents
- BOOKMARKS
- Spartan-3A DSP FPGA Family: 2
- Architectural Overview 3
- Configuration 4
- I/O Capabilities 4
- Package Marking 5
- Ordering Information 5
- Notice of Disclaimer 6
- Functional Description 7
- Power Supply Specifications 10
- Single-Ended I/O Standards 14
- Single-Ended Standards 15
- Differential I/O Standards 16
- Differential Output Pairs 17
- Device DNA Read Endurance 18
- Switching Characteristics 19
- I/O Timing 20
- Input Setup and Hold Times 22
- Input Propagation Times 24
- Ta b le 7 and Tabl e 1 0 25
- Input Timing Adjustments 26
- Output Propagation Times 27
- Output Timing Adjustments 29
- Single-Ended 32
- Conditions in Application 34
- Guidelines 34
- (Banks 0, 2) 35
- (Banks 1, 3) 35
- Symbol Description Minimum 40
- UnitsSpeed Grade 40
- Block RAM Timing 41
- DSP48A Timing 42
- Spread Spectrum 44
- Delay-Locked Loop (DLL) 44
- (2)(3)(4) 45
- Phase Shifter (PS) 48
- Miscellaneous DCM Timing 48
- DNA Port Timing 49
- Suspend Mode Timing 50
- Configuration and JTAG Timing 51
- DS312-3_05_103105 54
- Slave Parallel Mode Timing 55
- DS529-3_06_102506 56
- DS529-3_05_090610 58
- Figure 15: JTAG Waveforms 60
- Test Access Port 60
- Pinout Descriptions 62
- Package Pins by Type 63
- Package Overview 64
- Pinout Table 66
- User I/Os by Bank 72
- CS484 Footprint 73
- Right Half of CS484 74
- Package (Top View) 74
- XC3SD1800A FPGA 75
- XC3SD1800A FPGA (Cont’d) 76
- FG676 Footprint – 85
- Right Half of FG676 86
- XC3SD3400A FPGA 87
- XC3SD3400A FPGA (Cont’d) 88
- Migration Recommendations 100
- Revision History 101
Summary of Contents
DS610 October 4, 2010 www.xilinx.comProduct Specification 1© Copyright 2007–2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 10Power Supply Specificat
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 100Migration RecommendationsThere are
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 101Revision HistoryThe following table
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 11General Recommended Ope
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 12General DC Characterist
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 13Quiescent Current Requi
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 14Single-Ended I/O Standa
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 15Tabl e 1 1 : DC Chara
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 16Differential I/O Standa
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 17Differential Output Pai
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 18External Termination Re
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 19Switching Characteristi
DS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 2© Copyright 2007–2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, an
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 20I/O TimingPin-to-Pin Cl
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 21Pin-to-Pin Setup and Ho
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 22Input Setup and Hold Ti
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 23TIOICKPDTime from the a
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 24Input Propagation Times
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 25TIOPLIThe time it takes
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 26Input Timing Adjustment
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 27Output Propagation Time
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 28Three-State Output Prop
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 29Output Timing Adjustmen
Spartan-3A DSP FPGA Family: Introduction and Ordering InformationDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 3Architectural Overv
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 30LVCMOS25 Slow 2 mA 5.33
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 31LVCMOS12 Slow 2 mA 7.14
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 32Timing Measurement Meth
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 33The capacitive load (CL
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 34Using IBIS Models to Si
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 35 Tabl e 2 8 : Recomme
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 36LVC MO S 2 5 S l ow 2 7
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 37LVC MO S 1 2 S l ow 2 4
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 38Configurable Logic Bloc
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 39 Tabl e 3 0 : CLB Di
Spartan-3A DSP FPGA Family: Introduction and Ordering InformationDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 4ConfigurationSparta
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 40Clock Buffer/Multiplexe
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 41Block RAM TimingTabl e
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 42DSP48A TimingTo referen
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 43Tabl e 3 5 : Clock to
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 44Digital Clock Manager (
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 45 Tabl e 3 7 : Switchi
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 46Digital Frequency Synth
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 47 Tabl e 3 9 : Switchi
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 48Phase Shifter (PS)Misce
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 49DNA Port TimingTabl e
Spartan-3A DSP FPGA Family: Introduction and Ordering InformationDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 5Package MarkingFigu
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 50Suspend Mode TimingX-Re
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 51Configuration and JTAG
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 52Configuration Clock (CC
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 53Tabl e 4 7 : Master M
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 54Master Serial and Slave
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 55Slave Parallel Mode Tim
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 56Serial Peripheral Inter
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 57Tabl e 5 3 : Configur
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 58Byte Peripheral Interfa
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 59Tabl e 5 5 : Configur
Spartan-3A DSP FPGA Family: Introduction and Ordering InformationDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 6Revision HistoryThe
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 60IEEE 1149.1/1532 JTAG T
Spartan-3A DSP FPGA Family: DC and Switching CharacteristicsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 61Revision HistoryThe fol
DS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 62© Copyright 2007–2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, a
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 63Package Pins by TypeEach package has
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 64Electronic versions of the package p
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 65Package Thermal CharacteristicsThe p
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 66CS484: 484-Ball Chip-Scale Ball Grid
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 670 IO_L19P_0/GCLK8 F10 GCLK0 IO_L17N_
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 681 IO_L03N_1/A1 V20 DUAL1 IP_L08P_1 V
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 692 IP_2/VREF_2 Y14 VREF2 IO_L24N_2/D3
DS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 7© Copyright 2007–2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, an
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 703 IO_L36P_3 V4 I/O3 IO_L35N_3 W1 I/O
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 71GND GND T14 GNDGND GND T15 GNDGND GN
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 72User I/Os by BankTable 64 and Tabl e
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 73CS484 FootprintLeft Half of Package
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 74Right Half of CS484 Package (Top Vie
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 75FG676: 676-Ball Fine-Pitch Ball Grid
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 760 IP_0/VREF_0 D14 VREF0 IO_L22P_0 D1
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 770 VCCO_0 B11 VCCO0 VCCO_0 B16 VCCO0
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 781 IO_L50N_1 K21 I/O1 IO_L46N_1 K22 I
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 792 IO_L46P_2 W17 I/O2 IO_L09P_2 V10 I
Spartan-3A DSP FPGA Family: Functional DescriptionDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 8Revision HistoryThe following tabl
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 802 IO_L41N_2 AC20 I/O2 IO_L45N_2 AC21
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 813 IO_L48P_3 T10 I/O3 IO_L36P_3/VREF_
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 823 IP_L04P_3 C2 INPUT3 IO_L02N_3 B1 I
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 83GND GND F21 GNDGND GND F26 GNDGND GN
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 84User I/Os by BankTable 67 indicates
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 85FG676 Footprint – XC3SD1800A FPGALef
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 86Right Half of FG676 Package (Top Vie
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 87XC3SD3400A FPGATabl e 6 8 lists all
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 880 IO_L10N_0 D21 I/O0 IO_L05P_0 D22 I
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 891 IO_L12N_1 U18 I/O1 IO_L12P_1 U19 I
DS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 9© Copyright 2007–2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, an
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 901 IP_1/VREF_1 G25 VREF1 IO_L58P_1/VR
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 912 IO_L48P_2 AF23 I/O2 IO_L52P_2/D0/D
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 922 VCCO_2 AB8 VCCO2 VCCO_2 AB14 VCCO2
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 933 IO_L23N_3 K2 I/O3 IO_L23P_3 K3 I/O
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 94GND GND P12 GNDGND GND P16 GNDGND GN
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 95GND GND A23 GNDGND GND A26 GNDVCCAUX
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 96User I/Os by BankTable 69 indicates
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 97FG676 Footprint – XC3SD3400A FPGALef
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 98Right Half of FG676 Package (Top Vie
Spartan-3A DSP FPGA Family: Pinout DescriptionsDS610 (v3.0) October 4, 2010 www.xilinx.comProduct Specification 99Footprint Migration DifferencesThere
Related products and manuals for Computer Accessories Xilinx DS610
(58 pages)© 2020, manymanuals.com. All rights reserved. | 1.982 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Comments to this Manuals