Xilinx DS610 manuals

Xilinx DS610 User Manual (101 pages)

Brand: Xilinx | Category: Computer Accessories | Size: 2.57 MB |

English

Table of contents

Spartan-3A DSP FPGA Family:

2

Architectural Overview

3

Configuration

4

I/O Capabilities

4

Package Marking

5

Ordering Information

5

Notice of Disclaimer

6

Functional Description

7

Power Supply Specifications

10

Single-Ended I/O Standards

14

Single-Ended Standards

15

Differential I/O Standards

16

Differential Output Pairs

17

Device DNA Read Endurance

18

Switching Characteristics

19

I/O Timing

20

Input Setup and Hold Times

22

Input Propagation Times

24

Ta b le 7 and Tabl e 1 0

25

Input Timing Adjustments

26

Output Propagation Times

27

Output Timing Adjustments

29

Single-Ended

32

Conditions in Application

34

Guidelines

34

(Banks 0, 2)

35

(Banks 1, 3)

35

Symbol Description Minimum

40

UnitsSpeed Grade

40

Block RAM Timing

41

DSP48A Timing

42

Spread Spectrum

44

Delay-Locked Loop (DLL)

44

(2)(3)(4)

45

Phase Shifter (PS)

48

Miscellaneous DCM Timing

48

DNA Port Timing

49

Suspend Mode Timing

50

Configuration and JTAG Timing

51

DS312-3_05_103105

54

Slave Parallel Mode Timing

55

DS529-3_06_102506

56

DS529-3_05_090610

58

Figure 15: JTAG Waveforms

60

Test Access Port

60

Pinout Descriptions

62

Package Pins by Type

63

Package Overview

64

Pinout Table

66

User I/Os by Bank

72

CS484 Footprint

73

Right Half of CS484

74

Package (Top View)

74

XC3SD1800A FPGA

75

XC3SD1800A FPGA (Cont’d)

76

FG676 Footprint –

85

Right Half of FG676

86

XC3SD3400A FPGA

87

XC3SD3400A FPGA (Cont’d)

88

Migration Recommendations

100

Revision History

101

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