Xilinx ML403 User Manual

XAPP979 (v1.0) February 26, 2007 www.xilinx.com 1© 2007 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and

ML403 Board InformationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 10RThe resistors are located on the board as shown in Figure 12.Figure 12: ML4

ML403 Board InformationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 11RIf additional IIC devices are connected to the bus via the expansion header

ML403 Board InformationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 12RFigure 14 shows the FPGA pins driving the IIC Bus.TotalPhase Aardvark Adapt

ML403 Board InformationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 13RFigure 15 shows the Aardvark Control Center GUI.Interfacing to the OPB IIC

ML403 Board InformationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 14R3. Invoke XMD and connect to the MicroBlaze processor by the following comm

ML403 Board InformationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 15Rlow_level_dynamic_eeprom: This project transmits and receives data using th

Running the ApplicationsXAPP979 (v1.0) February 26, 2007 www.xilinx.com 16RFigure 18 shows the slave example. The message is in transmit.txt, and is

Running the ApplicationsXAPP979 (v1.0) February 26, 2007 www.xilinx.com 17RSelect dynamic_eeprom and right click to build the project. If more than o

Using ChipScope with OPB IICXAPP979 (v1.0) February 26, 2007 www.xilinx.com 18RUsingChipScope withOPB IICTo facilitate the use of ChipScope to analyz

Using ChipScope with OPB IICXAPP979 (v1.0) February 26, 2007 www.xilinx.com 19R5. Figure 23 shows the GUI for making net connections. Click Next to m

IntroductionXAPP979 (v1.0) February 26, 2007 www.xilinx.com 2RIntroduction This application note accompanies a reference system built on the ML403 de

Using ChipScope with OPB IICXAPP979 (v1.0) February 26, 2007 www.xilinx.com 20RThe waveform viewer is more readable when buses rather than discrete s

Linux KernelXAPP979 (v1.0) February 26, 2007 www.xilinx.com 21R13. ChipScope results are analyzed in the waveform window as shown in Figure 25. Thewa

Linux KernelXAPP979 (v1.0) February 26, 2007 www.xilinx.com 22R5. Under OS and Libraries, set the entries as shown in Figure 26.Verify that the targe

Linux KernelXAPP979 (v1.0) February 26, 2007 www.xilinx.com 23R6. Click Connect_Periphs and add the OPB_INTC, OPB_SYSACE, OPB_IIC, OPB_SPI,OPB_IIC, a

SimulationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 24Rcommand from the command prompt:impact -batch etc/download.cmd12. Invoke XMD. From the m

SimulationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 25RIn most cases, after data is transmitted, the test waits for an interrupt from the OPB I

SimulationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 26RThe simulation runs for 2000 ns as shown in Figure 29. There are 3 sections in the simul

SimulationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 27RIn the first test, which is shown in Figure 30, the OPB IIC registers are read to verify

SimulationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 28RFigure 31 provides the Arbitration Lost test code. This pseudo-code can be tracked in th

SimulationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 29RThe second test, shown in Figure 32, runs from 575 s to 790 s., Ths master, AA, receiv

IntroductionXAPP979 (v1.0) February 26, 2007 www.xilinx.com 3RFigure 4 shows the format of the data transfer of two bytes on the IIC bus, beginning w

SimulationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 30RFigure 33 provides the test code used in the simulation with the OPB IIC with the AA add

SimulationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 31RFigure 34 shows the third test shown in opb_iic.wlf, run from 800 - 2000 us. IIC_20 is t

SimulationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 32RFigure 35 provides the test code for simulation with IIC_AA as master.Figure 35: Test Co

ReferencesXAPP979 (v1.0) February 26, 2007 www.xilinx.com 33RReferences DS434 OPB IIC Bus Interface (v1.02a)XAPP765 Getting Started with EDK and Mont

Reference System SpecificsXAPP979 (v1.0) February 26, 2007 www.xilinx.com 4RFigure 6 shows the acknowledge bit on the IIC bus.Figure 7 shows bus arbit

Reference System SpecificsXAPP979 (v1.0) February 26, 2007 www.xilinx.com 5RML403 XC4VFX12 Address MapOPB IIC RegistersTable 2 provides the register m

Reference System SpecificsXAPP979 (v1.0) February 26, 2007 www.xilinx.com 6RStatus Register (SR)This register contains the status of the OPB IIC Bus I

Reference System SpecificsXAPP979 (v1.0) February 26, 2007 www.xilinx.com 7RTable 5 provides a register description of the Interrupt Status register.3

Reference System SpecificsXAPP979 (v1.0) February 26, 2007 www.xilinx.com 8RConfiguring the OPB IIC CoreFigure 8 shows how to specify the values of IIC

ML403 Board InformationXAPP979 (v1.0) February 26, 2007 www.xilinx.com 9Ris ‘1010 for read and write operations. The A2, A1 bits are dont cares. The