Xilinx PLB46 User Manual download pdf

DS619 (v1.0) September 17, 2007 www.xilinx.com

Product Specification 1

PowerPC is a trademark of IBM, Inc. All other trademarks are the property of their respective owners. All specifications are subject to change without notice.

Introduction

The ChipScope™ PLB IBA core is a specialized Bus

Analyzer core designed to debug embedded systems that

contain the IBM CoreConnect™ Processor Local Bus (PLB)

version 4.6. The ChipScope PLB46 IBA core in EDK is

based on a Tcl script that generates an HDL wrapper to the

PLB IBA and calls the ChipScope Core Generator to

generate the netlist based on user parameters.

Features

The ChipScope PLBv46 IBA is a soft IP core designed for

Xilinx® FPGAs and contains the following features:

• Probes the master, slave, arbiter, and error status

signals of the PLBv46 bus

• Probes the PLBv46 OR'ed slave signals

• Automatically adjusts ports to the PLBv46 bus width

• Separates master, slave, and error status signals into

independent match units which can be enabled or

disabled by a design parameter

• Allows independent enabling or disabling of probed

master, slave, and error status signals for data capture

• Supports trigger port customization by a design

parameter

• Supports match unit type customization for each trigger

port by a design parameter

• Supports sample depths from 1024-131,072 on

Virtex™-5 Devices selectable by a design parameter

• Can probe as few as 1 signals and as many as 1115

signals on a Virtex-5 device

• Provides a separate input bus to allow a user-defined

input debug port

• Supports a trigger output indicator pin that can be sent

off chip or to other cores

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)

DS619 (v1.0) September 17, 2007 Product Specification

LogiCORE™ Facts

Core Specifics

Supported Device

Family

Virtex-E, Virtex, Spartan™-3A DSP,

Spartan-3AN, Spartan-3A, Spartan-3E,

Spartan-3, Spartan-IIE, Spartan-II, Virtex-5

LX, Virtex-5 LXT Virtex-5 SXT, Virtex-4 FX,

Virtex-4 LX, Virtex-4 SX, Virtex-II Pro,

Virtex-II, Virtex-II Pro, Virtex-4

Version of Core chipscope_plb46_iba V1.00a

Resources Used

Min Max

Slices

LUTs

FFs

Block RAMs

Provided with Core

Documentation Product Specification

Design File

Formats

VHDL/EDIF

Constraints File N/A

Verification N/A

Instantiation

Templa t e

N/A

Reference Designs None

Design Tool Requirements

Xilinx

Implementation

Tools

ISE™ 9.2i or later

Verification ChipScope Pro 9.2i or later

Simulation Not supported in simulation

Synthesis XST

Support

Provided by Xilinx, Inc.

1 2 3 4 5 6 7 8 9 10

Summary of Contents

Page 1 - Features

Page 2 - Common Signals

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)DS619 (v1.0) September 17, 2007 www.xilinx.comProduct Specification 10Rassigned for this match group. When

Page 3 - PLB Arbitration Signals

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)DS619 (v1.0) September 17, 2007 www.xilinx.comProduct Specification 2RChipScope PLB46 IBA I/O SignalsTabl

Page 4 - PLB Master Signals

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)DS619 (v1.0) September 17, 2007 www.xilinx.comProduct Specification 3RP34 MU_2C PLB_TAttribute[0:15] Slave

Page 5 - Default

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)DS619 (v1.0) September 17, 2007 www.xilinx.comProduct Specification 4RThe IBA_PLBv46 ports listed in Table

Page 6

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)DS619 (v1.0) September 17, 2007 www.xilinx.comProduct Specification 5Ra user to look for multiple occurren

Page 7

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)DS619 (v1.0) September 17, 2007 www.xilinx.comProduct Specification 6RG8 PLB Address Bus Width C_PLBV46_AW

Page 8

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)DS619 (v1.0) September 17, 2007 www.xilinx.comProduct Specification 7RG30 0=basic, 1=basic w/ edges,2=exte

Page 9

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)DS619 (v1.0) September 17, 2007 www.xilinx.comProduct Specification 8RG46 1=Enable storing MU 6 signals in

Page 10 - PLB46_IBA

ChipScope PLBv46 IBA (Bus Analyzer) (v1.00a)DS619 (v1.0) September 17, 2007 www.xilinx.comProduct Specification 9RTabl e 2 lists the IBA PLBv46 param

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