Xilinx SP601 User Manual Page 47
- Page / 55
- Table of contents
- BOOKMARKS
- SP601 Hardware 1
- User Guide 1
- Revision History 3
- Table of Contents 5
- Appendix A: References 6
- Appendix D: SP601 Master UCF 6
- About This Guide 7
- Online Document 8
- SP601 Evaluation Board 9
- Features 10
- Related Xilinx Documents 11
- Detailed Description 12
- Configuration 13
- I/O Voltage Rails 13
- References 14
- X-Ref Target - Figure 1-3 16
- 3. SPI x4 Flash 18
- 4. Linear Flash BPI 20
- UG518 (v1.1) August 19, 2009 23
- 6. USB-to-UART Bridge 25
- 7. IIC Bus 26
- 8. Clock Generation 27
- SMA Connectors (Differential) 28
- Table 1-13: LPC Pinout 29
- 10. Status LEDs 32
- 12. FPGA INIT and DONE LEDs 34
- 13. User I/O 35
- User DIP switch 36
- User Pushbutton Switches 37
- GPIO Male Pin Header 38
- Power Management 40
- Configuration Options 42
- Appendix A: References 46
- Appendix B 47
- VITA 57.1 FMC Connections 49
- SP601 Master UCF 51
- Appendix D: SP601 Master UCF 52
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